1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
The sidewall spacer formed on the side of a gate electrode is one of the key elements in forming semiconductor devices having excellent characteristics (see, for example, A. Hokazono et al., “14 nm Gate Length CMOSFETs Utilizing Low Thermal Budget Process with Poly-Si Ge and Ni Salicide” IEDM Tech. Dig., 957, pp 639-642, 2002). As the dimensions of semiconductor devices are scaled down, it has become increasingly difficult to ensure the processing accuracy of sidewall spacers.
The sidewall spacer is usually formed in the following manner: First, a film of silicon oxide or silicon nitride as an insulating film for the spacer is formed so as to cover a gate electrode. Subsequently, the spacer insulating film is subjected to anisotropic etching by RIE using a fluorocarbon-based gas (CF4, CHF3, etc.). Thereby, the sidewall spacer is formed only on the side of the gate electrode. In this anisotropic etching, in order to make as small as possible the amount by which the silicon substrate is etched, it is required to make high the etch selectivity (selective ratio) of spacer insulating film to silicon substrate. The sidewall spacer is used as a mask for ion implantation of impurities for forming source/drain regions. In order to increase the masking accuracy, therefore, it is desired that the sidewall spacer be vertical in profile (sectional shape).
In order to increase the etch selectivity, it is required to increase the ratio of carbon to fluorine (C/F) in the etching gas. However, increasing the carbon-to-fluorine ratio results in a tapered sidewall spacer with the base widened; that is, the sidewall spacer fails to have vertical profile. Conversely, lowering the carbon-to-fluorine ratio makes it possible to make the sidewall spacer vertical in profile but results in the lowered etch selectivity, which increases the amount by which the silicon substrate is etched.
Thus, if the sidewall spacer is formed by means of plasma etching using a gas containing fluorine such as a fluorocarbon-based gas, it is difficult to provide high etch selectivity of spacer insulating film to silicon substrate and to form a sidewall spacer vertical in profile. For this reason, it is difficult to obtain a sidewall spacer in a desired processed state.
In addition, as the dimensions of semiconductor devices are scaled down, it has become increasingly difficult to obtain via holes and contact holes in desired processed states. As an example, a description is given of the formation of a via hole that reaches an interconnect line (wiring) of copper.
A via hole is usually formed in the following manner: First, a stopper insulating film (e.g., a silicon nitride film) is formed on a region formed with a copper interconnect line. Then, an interlayer insulating film is formed on the stopper insulating film. Next, a hole is formed in the interlayer insulating film by etching it using a photoresist as a mask. At this point, the stopper insulating film serves as etching stopper. After the removal of the photoresist, the stopper insulating film is subjected to a plasma anisotropic etching process using a fluorocarbon-based gas, thereby exposing the surface of the copper interconnect line. Consequently the via hole is formed.
However, after the etching of the stopper insulating film using the fluorocarbon-based gas, a deposit containing fluorine remains on the surface of the copper interconnect line. After that, while the resulting structure is carried to a wet processing system such as a chemical cleaning system, fluorine contained in the deposit reacts with moisture in the atmosphere to form hydrofluoric acid (HF). The presence of fluorine or hydrofluoric acid results in the occurrence of copper corrosion; that is, copper compounds are produced or copper is corroded. This prevents via metal from being formed properly in the via hole, causing connection failures, such as an increase in via resistance. Such problems of corrosion resulting from fluorine can also arise in the case of other metals than copper and metal silicides.
Thus, if, in forming via and contact holes, the stopper insulating film is etched by plasma etching using a fluorine-containing gas such as a fluorocarbon-based gas, corrosion occurs due to fluorine, making it difficult to produce via and contact holes in a desired processed state and causing connection failures.
As can be seen from the foregoing, with plasma etching using a fluorine-containing gas, it is difficult to obtain a desired processed state due to various problems; therefore, it is difficult to manufacture semiconductor devices which are excellent in characteristics and reliability.